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Thoroughly revised and updated, The Essentials of Computer Organization and Architecture, Second Edition is a comprehensive resource that addresses all of the necessary organization and architecture topics yet is concise enough to move through in a single semester. The text covers such topics as digital logic, data representation, machine-level language, general organization, assembly language programming, CPU organization, memory organization, and input/output devices, as well as a new chapter on Embedded Systems. Correlated to the ACM-IEEE Computing Curricula Guidelines, The Essentials of Computer Organization and Architecture is the forefront text for your Computer Organization and Architecture course.

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• Chapter 1 Introduction(p. 1)
• 1.1 Overview(p. 1)
• 1.2 The Main Components of a Computer(p. 3)
• 1.3 An Example System: Wading Through the Jargon(p. 4)
• 1.4 Standards Organizations(p. 13)
• 1.5 Historical Development(p. 14)
• 1.5.1 Generation Zero: Mechanical Calculating Machines (1642-1945)(p. 15)
• 1.5.2 The First Generation: Vacuum Tube Computers (1945-1953)(p. 17)
• 1.5.3 The Second Generation: Transistorized Computers (1954-1965)(p. 21)
• 1.5.4 The Third Generation: Integrated Circuit Computers (1965-1980)(p. 24)
• 1.5.5 The Fourth Generation: VLSI Computers (1980-????)(p. 24)
• 1.5.6 Moore's Law(p. 27)
• 1.6 The Computer Level Hierarchy(p. 28)
• 1.7 The von Neumann Model(p. 30)
• 1.8 Non-von Neumann Models(p. 32)
• Chapter Summary(p. 34)
• Further Reading(p. 34)
• References(p. 35)
• Review of Essential Terms and Concepts(p. 36)
• Exercises(p. 37)
• Chapter 2 Data Representation in Computer Systems(p. 39)
• 2.1 Introduction(p. 39)
• 2.2 Positional Numbering Systems(p. 40)
• 2.3 Decimal to Binary Conversions(p. 40)
• 2.3.1 Converting Unsigned Whole Numbers(p. 41)
• 2.3.2 Converting Fractions(p. 43)
• 2.3.3 Converting between Power-of-Two Radices(p. 46)
• 2.4 Signed Integer Representation(p. 46)
• 2.4.1 Signed Magnitude(p. 46)
• 2.4.2 Complement Systems(p. 52)
• 2.4.3 Unsigned Versus Signed Numbers(p. 58)
• 2.4.4 Computers, Arithmetic, and Booth's Algorithm(p. 58)
• 2.4.5 Carry Versus Overflow(p. 62)
• 2.5 Floating-Point Representation(p. 63)
• 2.5.1 A Simple Model(p. 64)
• 2.5.2 Floating-Point Arithmetic(p. 66)
• 2.5.3 Floating-Point Errors(p. 67)
• 2.5.4 The IEEE-754 Floating-Point Standard(p. 68)
• 2.5.5 Range, Precision, and Accuracy(p. 71)
• 2.5.6 Additional Problems with Floating-Point Numbers(p. 71)
• 2.6 Character Codes(p. 74)
• 2.6.1 Binary-Coded Decimal(p. 74)
• 2.6.2 EBCDIC(p. 76)
• 2.6.3 ASCII(p. 78)
• 2.6.4 Unicode(p. 80)
• 2.7 Error Detection and Correction(p. 81)
• 2.7.1 Cyclic Redundancy Check(p. 81)
• 2.7.2 Hamming Codes(p. 84)
• 2.7.3 Reed-Soloman(p. 90)
• Chapter Summary(p. 91)
• Further Reading(p. 91)
• References(p. 92)
• Review of Essential Terms and Concepts(p. 93)
• Exercises(p. 94)
• Chapter 3 Boolean Algebra and Digital Logic(p. 109)
• 3.1 Introduction(p. 109)
• 3.2 Boolean Algebra(p. 110)
• 3.2.1 Boolean Expressions(p. 111)
• 3.2.2 Boolean Identities(p. 112)
• 3.2.3 Simplification of Boolean Expressions(p. 114)
• 3.2.4 Complements(p. 115)
• 3.2.5 Representing Boolean Functions(p. 116)
• 3.3 Logic Gates(p. 118)
• 3.3.1 Symbols for Logic Gates(p. 118)
• 3.3.2 Universal Gates(p. 119)
• 3.3.3 Multiple Input Gates(p. 120)
• 3.4 Digital Components(p. 121)
• 3.4.1 Digital Circuits and Their Relationship to Boolean Algebra(p. 121)
• 3.4.2 Integrated Circuits(p. 122)
• 3.5 Combinational Circuits(p. 123)
• 3.5.1 Basic Concepts(p. 123)
• 3.5.2 Examples of Typical Combinational Circuits(p. 124)
• 3.6 Sequential Circuits(p. 131)
• 3.6.1 Basic Concepts(p. 131)
• 3.6.2 Clocks(p. 131)
• 3.6.3 Flip-Flops(p. 132)
• 3.6.4 Finite State Machines(p. 135)
• 3.6.5 Examples of Sequential Circuits(p. 140)
• 3.6.6 An Application of Sequential Logic: Convolutional Coding and Viterbi Detection(p. 145)
• 3.7 Designing Circuits(p. 151)
• Chapter Summary(p. 152)
• Further Reading(p. 152)
• References(p. 154)
• Review of Essential Terms and Concepts(p. 154)
• Exercises(p. 155)
• Chapter 4 MARIE: An Introduction to a Simple Computer(p. 177)
• 4.1 Introduction(p. 177)
• 4.2 CPU Basics and Organization(p. 177)
• 4.2.1 The Registers(p. 178)
• 4.2.2 The ALU(p. 179)
• 4.2.3 The Control Unit(p. 179)
• 4.3 The Bus(p. 179)
• 4.4 Clocks(p. 183)
• 4.5 The Input/Output Subsystem(p. 185)
• 4.6 Memory Organization and Addressing(p. 186)
• 4.7 Interrupts(p. 189)
• 4.8 MARIE(p. 190)
• 4.8.1 The Architecture(p. 190)
• 4.8.2 Registers and Buses(p. 190)
• 4.8.3 Instruction Set Architecture(p. 193)
• 4.8.4 Register Transfer Notation(p. 195)
• 4.9 Instruction Processing(p. 198)
• 4.9.1 The Fetch-Decode-Execute Cycle(p. 198)
• 4.9.2 Interrupts and the Instruction Cycle(p. 199)
• 4.9.3 MARIE's I/O(p. 203)
• 4.10 A Simple Program(p. 203)
• 4.11 A Discussion on Assemblers(p. 206)
• 4.11.1 What Do Assemblers Do?(p. 206)
• 4.11.2 Why Use Assembly Language?(p. 208)
• 4.12 Extending our Instruction Set(p. 209)
• 4.13 A Discussion on Decoding: Hardwired Versus Microprogrammed Control(p. 214)
• 4.13.1 Machine Control(p. 214)
• 4.13.2 Hardwired Control(p. 216)
• 4.13.3 Microprogrammed Control(p. 217)
• 4.14 Real-World Examples of Computer Architectures(p. 223)
• 4.14.1 Intel Architectures(p. 224)
• 4.14.2 MIPS Architectures(p. 230)
• Chapter Summary(p. 233)
• Further Reading(p. 234)
• References(p. 235)
• Review of Essential Terms and Concepts(p. 236)
• Exercises(p. 237)
• Chapter 5 A Closer Look at Instruction Set Architectures(p. 243)
• 5.1 Introduction(p. 243)
• 5.2 Instruction Formats(p. 243)
• 5.2.1 Design Decisions for Instruction Sets(p. 244)
• 5.2.2 Little Versus Big Endian(p. 245)
• 5.2.3 Internal Storage in the CPU: Stacks Versus Registers(p. 247)
• 5.2.4 Number of Operands and Instruction Length(p. 248)
• 5.2.5 Expanding Opcodes(p. 252)
• 5.3 Instruction Types(p. 254)
• 5.3.1 Data Movement(p. 254)
• 5.3.2 Arithmetic Operations(p. 254)
• 5.3.3 Boolean Logic Instructions(p. 255)
• 5.3.4 Bit Manipulation Instructions(p. 255)
• 5.3.5 Input/Output Instructions(p. 256)
• 5.3.6 Instructions for Transfer of Control(p. 256)
• 5.3.7 Special Purpose Instructions(p. 256)
• 5.3.8 Instruction Set Orthogonality(p. 256)
• 5.4 Addressing(p. 257)
• 5.4.1 Data Types(p. 257)
• 5.4.2 Address Modes(p. 258)
• 5.5 Instruction-Level Pipelining(p. 261)
• 5.6 Real-World Examples of ISAs(p. 266)
• 5.6.1 Intel(p. 266)
• 5.6.2 MIPS(p. 267)
• 5.6.3 Java Virtual Machine(p. 267)
• Chapter Summary(p. 271)
• Further Reading(p. 272)
• References(p. 273)
• Review of Essential Terms and Concepts(p. 274)
• Exercises(p. 275)
• Chapter 6 Memory(p. 281)
• 6.1 Introduction(p. 281)
• 6.2 Types of Memory(p. 281)
• 6.3 The Memory Hierarchy(p. 283)
• 6.3.1 Locality of Reference(p. 285)
• 6.4 Cache Memory(p. 285)
• 6.4.1 Cache Mapping(p. 287)
• 6.4.2 Replacement Policies(p. 295)
• 6.4.3 Effective Access Time and Hit Ratio(p. 296)
• 6.4.4 When Does Caching Break Down?(p. 297)
• 6.4.5 Cache Write Policies(p. 297)
• 6.4.6 Instruction and Data Caches(p. 300)
• 6.4.7 Levels of Cache(p. 301)
• 6.5 Virtual Memory(p. 302)
• 6.5.1 Paging(p. 303)
• 6.5.2 Effective Access Time Using Paging(p. 310)
• 6.5.3 Putting It All Together: Using Cache, TLBs, and Paging(p. 311)
• 6.5.4 Advantages and Disadvantages of Paging and Virtual Memory(p. 313)
• 6.5.5 Segmentation(p. 314)
• 6.5.6 Paging Combined with Segmentation(p. 315)
• 6.6 A Real-World Example of Memory Management(p. 316)
• Chapter Summary(p. 317)
• Further Reading(p. 318)
• References(p. 318)
• Review of Essential Terms and Concepts(p. 319)
• Exercises(p. 320)
• Chapter 7 Input/Output and Storage Systems(p. 327)
• 7.1 Introduction(p. 327)
• 7.2 I/O and Performance(p. 328)
• 7.3 Amdahl's Law(p. 328)
• 7.4 I/O Architectures(p. 329)
• 7.4.1 I/O Control Methods(p. 331)
• 7.4.2 Character I/O Versus Block I/O(p. 338)
• 7.4.3 I/O Bus Operation(p. 338)
• 7.5 Data Transmission Modes(p. 341)
• 7.5.1 Parallel Data Transmission(p. 341)
• 7.5.2 Serial Data Transmission(p. 345)
• 7.6 Magnetic Disk Technology(p. 345)
• 7.6.1 Rigid Disk Drives(p. 347)
• 7.6.2 Flexible (Floppy) Disks(p. 351)
• 7.7 Optical Disks(p. 353)
• 7.7.1 CD-ROM(p. 353)
• 7.7.2 DVD(p. 357)
• 7.7.3 Blue-Violet Laser Disks(p. 358)
• 7.7.4 Optical Disk Recording Methods(p. 358)
• 7.8 Magnetic Tape(p. 359)
• 7.9 RAID(p. 364)
• 7.9.1 RAID Level 0(p. 365)
• 7.9.2 RAID Level 1(p. 366)
• 7.9.3 RAID Level 2(p. 366)
• 7.9.4 RAID Level 3(p. 367)
• 7.9.5 RAID Level 4(p. 368)
• 7.9.6 RAID Level 5(p. 369)
• 7.9.7 RAID Level 6(p. 370)
• 7.9.8 RAID DP(p. 371)
• 7.9.9 Hybrid RAID Systems(p. 372)
• 7.10 The Future of Data Storage(p. 372)
• Chapter Summary(p. 377)
• Further Reading(p. 377)
• References(p. 378)
• Review of Essential Terms and Concepts(p. 379)
• Exercises(p. 381)
• Chapter 8 System Software(p. 407)
• 8.1 Introduction(p. 407)
• 8.2 Operating Systems(p. 408)
• 8.2.1 Operating Systems History(p. 409)
• 8.2.2 Operating System Design(p. 414)
• 8.2.3 Operating System Services(p. 416)
• 8.3 Protected Environments(p. 420)
• 8.3.1 Virtual Machines(p. 421)
• 8.3.2 Subsystems and Partitions(p. 424)
• 8.3.3 Protected Environments and the Evolution of Systems Architectures(p. 426)
• 8.4 Programming Tools(p. 428)
• 8.4.1 Assemblers and Assembly(p. 428)
• 8.4.2 Link Editors(p. 431)
• 8.4.3 Dynamic Link Libraries(p. 432)
• 8.4.4 Compilers(p. 434)
• 8.4.5 Interpreters(p. 438)
• 8.5 Java: All of the Above(p. 439)
• 8.6 Database Software(p. 445)
• 8.7 Transaction Managers(p. 451)
• Chapter Summary(p. 453)
• Further Reading(p. 455)
• References(p. 456)
• Review of Essential Terms and Concepts(p. 456)
• Exercises(p. 457)
• Chapter 9 Alternative Architectures(p. 461)
• 9.1 Introduction(p. 461)
• 9.2 RISC Machines(p. 462)
• 9.3 Flynn's Taxonomy(p. 467)
• 9.4 Parallel and Multiprocessor Architectures(p. 471)
• 9.4.1 Superscalar and VLIW(p. 472)
• 9.4.2 Vector Processors(p. 474)
• 9.4.3 Interconnection Networks(p. 475)
• 9.4.4 Shared Memory Multiprocessors(p. 480)
• 9.4.5 Distributed Computing(p. 484)
• 9.5 Alternative Parallel Processing Approaches(p. 487)
• 9.5.1 Dataflow Computing(p. 487)
• 9.5.2 Neural Networks(p. 489)
• 9.5.3 Systolic Arrays(p. 492)
• 9.6 Quantum Computing(p. 494)
• Chapter Summary(p. 496)
• Further Reading(p. 497)
• References(p. 497)
• Review of Essential Terms and Concepts(p. 499)
• Exercises(p. 500)
• Chapter 10 Topics in Embedded Systems(p. 05)
• 10.1 Introduction(p. 505)
• 10.2 An Overview of Embedded Hardware(p. 507)
• 10.2.1 Off-the-Shelf Embedded System Hardware(p. 507)
• 10.2.2 Configurable Hardware(p. 511)
• 10.2.3 Custom-Designed Embedded Hardware(p. 518)
• 10.3 An Overview of Embedded Software(p. 526)
• 10.3.1 Embedded Systems Memory Organization(p. 527)
• 10.3.2 Embedded Operating Systems(p. 528)
• 10.3.3 Embedded Systems Software Development(p. 531)
• Chapter Summary(p. 533)
• Further Reading(p. 535)
• References(p. 536)
• Review of Essential Terms and Concepts(p. 537)
• Exercises(p. 538)
• Chapter 11 Performance Measurement and Analysis(p. 541)
• 11.1 Introduction(p. 541)
• 11.2 Computer Performance Equations(p. 542)
• 11.3 Mathematical Preliminaries(p. 543)
• 11.3.1 What the Means Mean(p. 544)
• 11.3.2 The Statistics and Semantics(p. 549)
• 11.4 Benchmarking(p. 551)
• 11.4.1 Clock Rate, MIPS, and FLOPS(p. 552)
• 11.4.2 Synthetic Benchmarks: Whetstone, Linpack, and Dhrystone(p. 554)
• 11.4.3 Standard Performance Evaluation Corporation Benchmarks(p. 555)
• 11.4.4 Transaction Processing Performance Council Benchmarks(p. 559)
• 11.4.5 System Simulation(p. 566)
• 11.5 CPU Performance Optimization(p. 567)
• 11.5.1 Branch Optimization(p. 567)
• 11.5.2 Use of Good Algorithms and Simple Code(p. 570)
• 11.6 Disk Performance(p. 574)
• 11.6.1 Understanding the Problem(p. 574)
• 11.6.2 Physical Considerations(p. 575)
• 11.6.3 Logical Considerations(p. 576)
• Chapter Summary(p. 582)
• Further Reading(p. 583)
• References(p. 584)
• Review of Essential Terms and Concepts(p. 585)
• Exercises(p. 585)
• Chapter 12 Network Organization and Architecture(p. 591)
• 12.1 Introduction(p. 591)
• 12.2 Early Business Computer Networks(p. 591)
• 12.3 Early Academic and Scientific Networks: The Roots and Architecture of the Internet(p. 592)
• 12.4 Network Protocols I: ISO/OSI Protocol Unification(p. 596)
• 12.4.1 A Parable(p. 597)
• 12.4.2 The OSI Reference Model(p. 598)
• 12.5 Network Protocols II: TCP/IP Network Architecture(p. 602)
• 12.5.1 The IP Layer for Version 4(p. 602)
• 12.5.2 The Trouble with IP Version 4(p. 606)
• 12.5.3 Transmission Control Protocol(p. 610)
• 12.5.4 The TCP Protocol at Work(p. 611)
• 12.5.5 IP Version 6(p. 615)
• 12.6 Network Organization(p. 622)
• 12.6.1 Physical Transmission Media(p. 622)
• 12.6.2 Interface Cards(p. 630)
• 12.6.3 Repeaters(p. 631)
• 12.6.4 Hubs(p. 631)
• 12.6.5 Switches(p. 632)
• 12.6.6 Bridges and Gateways(p. 633)
• 12.6.7 Routers and Routing(p. 634)
• 12.7 High-Capacity Digital Links(p. 643)
• 12.7.1 The Digital Hierarchy(p. 643)
• 12.7.2 ISDN(p. 648)
• 12.7.3 Asynchronous Transfer Mode(p. 651)
• 12.8 A Look at the Internet(p. 652)
• 12.8.1 Ramping on to the Internet(p. 653)
• 12.8.2 Ramping up the Internet(p. 660)
• Chapter Summary(p. 661)
• Further Reading(p. 661)
• References(p. 663)
• Review of Essential Terms and Concepts(p. 663)
• Exercises(p. 665)
• Chapter 13 Selected Storage Systems and Interfaces(p. 669)
• 13.1 Introduction(p. 669)
• 13.2 SCSI Architecture(p. 670)
• 13.2.1 "Classic" Parallel SCSI(p. 671)
• 13.2.2 The SCSI Architecture Model-3(p. 675)
• 13.3 Internet SCSI(p. 682)
• 13.4 Storage Area Networks(p. 685)
• 13.5 Other I/O Connections(p. 685)
• 13.5.1 Parallel Buses: XT to ATA(p. 686)
• 13.5.2 Serial ATA and Serial Attached SCSI(p. 687)
• 13.5.3 Peripheral Component Interconnect(p. 688)
• 13.5.4 A Serial Interface: USB(p. 689)
• 13.5.5 High Performance Peripheral Interface: HiPPI(p. 689)
• Chapter Summary(p. 690)
• Further Reading(p. 691)
• References(p. 691)
• Review of Essential Terms and Concepts(p. 692)
• Exercises(p. 692)
• Appendix A Data Structures and the Computer(p. 695)
• A.1 Introduction(p. 695)
• A.2 Fundamental Structures(p. 695)
• A.2.1 Arrays(p. 695)
• A.2.2 Queues and Linked Lists(p. 697)
• A.2.3 Stacks(p. 698)
• A.3 Trees(p. 701)
• A.4 Network Graphs(p. 707)
• Summary(p. 710)
• Further Reading(p. 710)
• References(p. 710)
• Exercises(p. 710)
• Glossary(p. 715)
• Answers and Hints for Selected Exercises(p. 757)
• Index(p. 773)