Descripciones mejoradas de Syndetics:

Aimed at electrical and electronics engineers, technicians, EE students and hobbyists, this guide aims to give an easy read depiction of complex technologies. thousands more electronics technicians and hobbyists. With the addition of so many communication topics into EE programs in the past five years, fundamentals of digital design have bene abandoned for a more brief, overview courses, leaving many newly minted EEs undereducated in what should be one of their core competencies. navigate many componenst, architectures and practices which are painfully inter-dependent. This guide allows the reader faced with a design problem to develop a customized set of requirements for that problem, then research and evaluate available components and technologies to solve it.

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• Preface(p. xiii)
• Acknowledgments(p. xix)
• Part 1 Digital Fundamentals
• Chapter 1 Digital Logic(p. 3)
• 1.1 Boolean Logic(p. 3)
• 1.2 Boolean Manipulation(p. 7)
• 1.3 The Karnaugh map(p. 8)
• 1.4 Binary and Hexadecimal Numbering(p. 10)
• 1.5 Binary Addition(p. 14)
• 1.6 Subtraction and Negative Numbers(p. 15)
• 1.7 Multiplication and Division(p. 17)
• 1.8 Flip-Flops and Latches(p. 18)
• 1.9 Synchronous Logic(p. 21)
• 1.10 Synchronous Timing Analysis(p. 23)
• 1.11 Clock Skew(p. 25)
• 1.12 Clock Jitter(p. 27)
• 1.13 Derived Logical Building Blocks(p. 28)
• Chapter 2 Integrated Circuits and the 7400 Logic Families(p. 33)
• 2.1 The Integrated Circuit(p. 33)
• 2.2 IC Packaging(p. 38)
• 2.3 The 7400-Series Discrete Logic Family(p. 41)
• 2.4 Applying the 7400 Family to Logic Design(p. 43)
• 2.5 Synchronous Logic Design with the 7400 Family(p. 45)
• 2.6 Common Variants of the 7400 Family(p. 50)
• 2.7 Interpreting a Digital IC Data Sheet(p. 51)
• Chapter 3 Basic Computer Architecture(p. 55)
• 3.1 The Digital Computer(p. 56)
• 3.2 Microprocessor Internals(p. 58)
• 3.3 Subroutines and the Stack(p. 60)
• 3.4 Reset and Interrupts(p. 62)
• 3.5 Implementation of an Eight-Bit Computer(p. 63)
• 3.6 Address Banking(p. 67)
• 3.7 Direct Memory Access(p. 68)
• 3.8 Extending the Microprocessor Bus(p. 70)
• 3.9 Assembly Language and Addressing Modes(p. 72)
• Chapter 4 Memory(p. 77)
• 4.1 Memory Classifications(p. 77)
• 4.2 EPROM(p. 79)
• 4.3 Flash Memory(p. 81)
• 4.4 EEPROM(p. 85)
• 4.5 Asynchronous SRAM(p. 86)
• 4.6 Asynchronous DRAM(p. 88)
• 4.7 Multiport Memory(p. 92)
• 4.8 The FIFO(p. 94)
• Chapter 5 Serial Communications(p. 97)
• 5.1 Serial vs. Parallel Communication(p. 98)
• 5.2 The UART(p. 99)
• 5.3 ASCII Data Representation(p. 102)
• 5.4 RS-232(p. 102)
• 5.5 RS-422(p. 107)
• 5.6 Modems and Baud Rate(p. 108)
• 5.7 Network Topologies(p. 109)
• 5.8 Network Data Formats(p. 110)
• 5.9 RS-485(p. 112)
• 5.10 A Simple RS-485 Network(p. 114)
• 5.11 Interchip Serial Communications(p. 117)
• Chapter 6 Instructive Microprocessors and Microcomputer Elements(p. 121)
• 6.1 Evolution(p. 121)
• 6.2 Motorola 6800 Eight-bit Microprocessor Family(p. 122)
• 6.3 Intel 8051 Microcontroller Family(p. 125)
• 6.4 Microchip PIC Microcontroller Family(p. 131)
• 6.5 Intel 8086 16-Bit Microprocessor Family(p. 134)
• 6.6 Motorola 68000 16/32-Bit Microprocessor Family(p. 139)
• Part 2 Advanced Digital Systems
• Chapter 7 Advanced Microprocessor Concepts(p. 145)
• 7.1 RISC and CISC(p. 145)
• 7.2 Cache Structures(p. 149)
• 7.3 Caches in Practice(p. 154)
• 7.4 Virtual Memory and the MMU(p. 158)
• 7.5 Superpipelined and Superscalar Architectures(p. 161)
• 7.6 Floating-Point Arithmetic(p. 165)
• 7.7 Digital Signal Processors(p. 167)
• 7.8 Performance Metrics(p. 169)
• Chapter 8 High-Performance Memory Technologies(p. 173)
• 8.1 Synchronous DRAM(p. 173)
• 8.2 Double Data Rate SDRAM(p. 179)
• 8.3 Synchronous SRAM(p. 182)
• 8.4 DDR and QDR SRAM(p. 185)
• 8.5 Content Addressable Memory(p. 188)
• Chapter 9 Networking(p. 193)
• 9.1 Protocol Layers One and Two(p. 193)
• 9.2 Protocol Layers Three and Four(p. 194)
• 9.3 Physical Media(p. 197)
• 9.4 Channel Coding(p. 198)
• 9.5 8B10B Coding(p. 203)
• 9.6 Error Detection(p. 207)
• 9.7 Checksum(p. 208)
• 9.8 Cyclic Redundancy Check(p. 209)
• 9.9 Ethernet(p. 215)
• Chapter 10 Logic Design and Finite State Machines(p. 221)
• 10.1 Hardware Description Languages(p. 221)
• 10.2 CPU Support Logic(p. 227)
• 10.3 Clock Domain Crossing(p. 233)
• 10.4 Finite State Machines(p. 237)
• 10.5 FSM Bus Control(p. 239)
• 10.6 FSM Optimization(p. 243)
• 10.7 Pipelining(p. 245)
• Chapter 11 Programmable Logic Devices(p. 249)
• 11.1 Custom and Programmable Logic(p. 249)
• 11.2 GALs and PALs(p. 252)
• 11.3 CPLDs(p. 255)
• 11.4 FPGAs(p. 257)
• Part 3 Analog Basics for Digital Systems
• Chapter 12 Electrical Fundamentals(p. 267)
• 12.1 Basic Circuits(p. 267)
• 12.2 Loop and Node Analysis(p. 268)
• 12.3 Resistance Combination(p. 271)
• 12.4 Capacitors(p. 272)
• 12.5 Capacitors as AC Elements(p. 274)
• 12.6 Inductors(p. 276)
• 12.7 Nonideal RLC Models(p. 276)
• 12.8 Frequency Domain Analysis(p. 279)
• 12.9 Lowpass and Highpass Filters(p. 283)
• 12.10 Transformers(p. 288)
• Chapter 13 Diodes and Transistors(p. 293)
• 13.1 Diodes(p. 293)
• 13.2 Power Circuits with Diodes(p. 296)
• 13.3 Diodes in Digital Applications(p. 298)
• 13.4 Bipolar Junction Transistors(p. 300)
• 13.5 Digital Amplification with the BJT(p. 301)
• 13.6 Logic Functions with the BJT(p. 304)
• 13.7 Field-Effect Transistors(p. 306)
• 13.8 Power FETs and JFETs(p. 309)
• Chapter 14 Operational Amplifiers(p. 311)
• 14.1 The Ideal Op-amp(p. 311)
• 14.2 Characteristics of Real Op-amps(p. 316)
• 14.3 Bandwidth Limitations(p. 324)
• 14.4 Input Resistance(p. 325)
• 14.5 Summation Amplifier Circuits(p. 328)
• 14.6 Active Filters(p. 331)
• 14.7 Comparators and Hysteresis(p. 333)
• Chapter 15 Analog Interfaces for Digital Systems(p. 339)
• 15.1 Conversion between Analog and Digital Domains(p. 339)
• 15.2 Sampling Rate and Aliasing(p. 341)
• 15.3 ADC Circuits(p. 345)
• 15.4 DAC Circuits(p. 348)
• 15.5 Filters in Data Conversion Systems(p. 350)
• Part 4 Digital System Design in Practice
• Chapter 16 Clock Distribution(p. 355)
• 16.1 Crystal Oscillators and Ceramic Resonators(p. 355)
• 16.2 Low-Skew Clock Buffers(p. 357)
• 16.3 Zero-Delay Buffers: The PLL(p. 360)
• 16.4 Frequency Synthesis(p. 364)
• 16.5 Delay-Locked Loops(p. 366)
• 16.6 Source-Synchronous Clocking(p. 367)
• Chapter 17 Voltage Regulation and Power Distribution(p. 371)
• 17.1 Voltage Regulation Basics(p. 372)
• 17.2 Thermal Analysis(p. 374)
• 17.3 Zener Diodes and Shunt Regulators(p. 376)
• 17.4 Transistors and Discrete Series Regulators(p. 379)
• 17.5 Linear Regulators(p. 382)
• 17.6 Switching Regulators(p. 386)
• 17.7 Power Distribution(p. 389)
• 17.8 Electrical Integrity(p. 392)
• Chapter 18 Signal Integrity(p. 397)
• 18.1 Transmission Lines(p. 398)
• 18.2 Termination(p. 403)
• 18.3 Crosstalk(p. 408)
• 18.4 Electromagnetic Interference(p. 410)
• 18.5 Grounding and Electromagnetic Compatibility(p. 413)
• 18.6 Electrostatic Discharge(p. 415)
• Chapter 19 Designing for Success(p. 419)
• 19.1 Practical Technologies(p. 420)
• 19.2 Printed Circuit Boards(p. 422)
• 19.3 Manually Wired Circuits(p. 425)
• 19.4 Microprocessor Reset(p. 428)
• 19.5 Design for Debug(p. 429)
• 19.6 Boundary Scan(p. 431)
• 19.7 Diagnostic Software(p. 433)
• 19.8 Schematic Capture and Spice(p. 436)
• 19.9 Test Equipment(p. 440)
• Appendix A Further Education(p. 443)
• Index(p. 445)