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Striking an ideally balanced approach, this text introduces students to microprocessor fundamentals by using a pedagogical SAP (Simple-As-Possible) model computer. The text then relates these fundamentals to three real-world examples: Intel's 8085, Motorola's 6800, and the 6502 chip used by Apple Computers. Instructors can focus on just one of these popular microprocessors, or include the features of others. This edition correlates closely with popular chip trainers and includes added coverage of the Intel 8088 16-bit microprocessors. It also includes a student version of the TASM cross-assembler software program. Experiments for Digital Computer Electronics, prepared expressly for this Third Edition, contains hardware and software experiments that allow students to expand upon the topics covered in the text through hands-on exercises. An Instructor's Guide containing answers to chapter questions and experiment results is also offered. Copyright © Libri GmbH. All rights reserved.

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• Preface(p. vi)
• Part 1 Digital Principles(p. 1)
• Chapter 1. Number Systems and Codes(p. 1)
• 1-1. Decimal Odometer
• 1-2. Binary Odometer
• 1-3. Number Codes
• 1-4. Why Binary Numbers Are Used
• 1-5. Binary-to-Decimal Conversion
• 1-6. Microprocessors
• 1-7. Decimal-to-Binary Conversion
• 1-8. Hexadecimal Numbers
• 1-9. Hexadecimal-Binary Conversions
• 1-10. Hexadecimal-to-Decimal Conversion
• 1-11. Decimal-to-Hexadecimal Conversion
• 1-12. BCD Numbers
• 1-13. The ASCII Code
• Chapter 2. Gates(p. 19)
• 2-1. Inverters
• 2-2. Or Gates
• 2-3. And Gates
• 2-4. Boolean Algebra
• Chapter 3. More Logic Gates(p. 32)
• 3-1. Nor Gates
• 3-2. De Morgan's First Theorem
• 3-3. Nand Gates
• 3-4. De Morgan's Second Theorem
• 3-5. Exclusive-Or Gates
• 3-6. The Controlled Inverter
• 3-7. Exclusive-Nor Gates
• Chapter 4. TTL Circuits(p. 48)
• 4-1. Digital Integrated Circuits
• 4-2. 7400 Devices
• 4-3. TTL Characteristics
• 4-4. TTL Overview
• 4-5. And-Or-Invert Gates
• 4-6. Open-Collector Gates
• 4-7. Multiplexers
• Chapter 5. Boolean Algebra and Karnaugh Maps(p. 64)
• 5-1. Boolean Relations
• 5-2. Sum-of-Products Method
• 5-3. Algebraic Simplification
• 5-4. Karnaugh Maps
• 5-5. Pairs, Quads, and Octets
• 5-6. Karnaugh Simplifications
• 5-7. Don't-Care Conditions
• Chapter 6. Arithmetic-Logic Units(p. 79)
• 6-1. Binary Addition
• 6-2. Binary Subtraction
• 6-3. Half Adders
• 6-4. Full Adders
• 6-5. Binary Adders
• 6-6. Signed Binary Numbers
• 6-7. 2's Complement
• 6-8. 2's-Complement Adder-Subtracter
• Chapter 7. Flip-Flops(p. 90)
• 7-1. RS Latches
• 7-2. Level Clocking
• 7-3. D Latches
• 7-4. Edge-Triggered D Flip-Flops
• 7-5. Edge-Triggered JK Flip-Flops
• 7-6. JK Master-Slave Flip-Flop
• Chapter 8. Registers and Counters(p. 106)
• 8-1. Buffer Registers
• 8-2. Shift Registers
• 8-3. Controlled Shift Registers
• 8-4. Ripple Counters
• 8-5. Synchronous Counters
• 8-6. Ring Counters
• 8-7. Other Counters
• 8-8. Three-State Registers
• 8-9. Bus-Organized Computers
• Chapter 9. Memories(p. 130)
• 9-1. ROMs
• 9-2. PROMs and EPROMs
• 9-3. RAMs
• 9-4. A Small TTL Memory
• 9-5. Hexadecimal Addresses
• Part 2 SAP (Simple-as-Possible) Computers(p. 140)
• Chapter 10. SAP-1(p. 140)
• 10-1. Architecture
• 10-2. Instruction Set
• 10-3. Programming SAP-1
• 10-4. Fetch Cycle
• 10-5. Execution Cycle
• 10-6. The SAP-1 Microprogram
• 10-7. The SAP-1 Schematic Diagram
• 10-8. Microprogramming
• Chapter 11. SAP-2(p. 173)
• 11-1. Bidirectional Registers
• 11-2. Architecture
• 11-3. Memory-Reference Instructions
• 11-4. Register Instructions
• 11-5. Jump and Call Instructions
• 11-6. Logic Instructions
• 11-7. Other Instructions
• 11-8. SAP-2 Summary
• Chapter 12. SAP-3(p. 195)
• 12-1. Programming Model
• 12-2. MOV and MVI
• 12-3. Arithmetic Instructions
• 12-4. Increments, Decrements, and Rotates
• 12-5. Logic Instructions
• 12-6. Arithmetic and Logic Immediates
• 12-7. Jump Instructions
• 12-8. Extended-Register Instructions
• 12-9. Indirect Instructions
• 12-10. Stack Instructions
• Part 3 Programming Popular Microprocessors(p. 213)
• Chapter 13. Introduction to Microprocessors(p. 213)
• 13-1. Computer Hardware
• 13-2. Definition of a Microprocessor
• 13-3. Some Common Uses for Microprocessors
• 13-4. Microprocessors Featured in This Text
• 13-5. Access to Microprocessors
• Chapter 14. Programming and Languages(p. 216)
• 14-1. Relationship between Electronics and Programming
• 14-2. Programming
• 14-3. Fundamental Premise
• 14-4. Flowcharts
• 14-5. Programming Languages
• 14-6. Assembly Language
• 14-7. Worksheets
• Chapter 15. System Overview(p. 224)
• New Concepts
• 15-1. Computer Architecture
• 15-2. Microprocessor Architecture
• Specific Microprocessor Families
• 15-3. 6502 Family
• 15-4. 6800/6808 Family
• 15-5. 8080/8085/Z80 Family
• 15-6. 8086/8088 Family
• Chapter 16. Data Transfer Instructions(p. 240)
• New Concepts
• 16-1. CPU Control Instructions
• 16-2. Data Transfer Instructions
• Specific Microprocessor Families
• 16-3. 6502 Family
• 16-4. 6800/6808 Family
• 16-5. 8080/8085/Z80 Family
• 16-6. 8086/8088 Family
• Chapter 17. Addressing Modes--I(p. 263)
• New Concepts
• 17-1. What Is an Addressing Mode?
• 17-2. The Paging Concept
• 17-3. Basic Addressing Modes
• Specific Microprocessor Families
• 17-4. 6502 Family
• 17-5. 6800/6808 Family
• 17-6. 8080/8085/Z80 Family
• 17-7. 8086/8088 Family
• Chapter 18. Arithmetic and Flags(p. 270)
• New Concepts
• 18-1. Microprocessors and Numbers
• 18-2. Arithmetic Instructions
• 18-3. Flag Instructions
• Specific Microprocessor Families
• 18-4 6502 Family
• 18-5. 6800/6808 Family
• 18-6. 8080/8085/Z80 Family
• 18-7. 8086/8088 Family
• Chapter 19. Logical Instructions(p. 305)
• New Concepts
• 19-1. The and Instruction
• 19-2. The or Instruction
• 19-3. The Exclusive-or (EOR, XOR) Instruction
• 19-4. The not Instruction
• 19-5. The NEG (NEGate) Instruction
• Specific Microprocessor Families
• 19-6. 6502 Family
• 19-7. 6800/6808 Family
• 19-8. 8080/8085/Z80 Family
• 19-9. 8086/8088 Family
• Chapter 20. Shift and Rotate Instructions(p. 319)
• New Concepts
• 20-1. Rotating
• 20-2. Shifting
• 20-3. An Example
• Specific Microprocessor Families
• 20-4. 6502 Family
• 20-5. 6800/6808 Family
• 20-6. 8080/8085/Z80 Family
• 20-7. 8086/8088 Family
• Chapter 21. Addressing Modes--II(p. 329)
• New Concepts
• 21-1. Advanced Addressing Modes
• Specific Microprocessor Families
• 21-2. 6502 Family
• 21-3. 6800/6808 Family
• 21-4. 8080/8085/Z80 Family
• 21-5. 8086/8088 Family
• Chapter 22. Branching and Loops(p. 342)
• New Concepts
• 22-1. Unconditional Jumps
• 22-2. Conditional Branching
• 22-3. Compare and Test Instructions
• 22-4. Increment and Decrement Instructions
• 22-5. Nested Loops
• Specific Microprocessor Families
• 22-6. 6502 Family
• 22-7. 6800/6808 Family
• 22-8. 8080/8085/Z80 Family
• 22-9. 8086/8088 Family
• Chapter 23. Subroutine and Stack Instructions(p. 363)
• New Concepts
• 23-1. Stack and Stack Pointer
• 23-2. Branching versus Subroutines
• 23-3. How Do Subroutines Return?
• 23-4. Pushing and Popping Registers
• Specific Microprocessor Families
• 23-5. 6502 Family
• 23-6. 6800/6808 Family
• 23-7. 8080/8085/Z80 Family
• 24-8. 8086/8088 Family
• Part 4 Microprocessor Instruction Set Tables(p. 379)
• A.
• Expanded Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed by Category(p. 381)
• Mini Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed by Category(p. 410)
• Condensed Table of 8085/8080 and Z80 (8080) Instructions Listed by Category(p. 415)
• Condensed Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed by Op Code(p. 417)
• Condensed Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed Alphabetically by 8085/8080 Mnemonic(p. 419)
• Condensed Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed Alphabetically by Z80 Mnemonic(p. 421)
• B.
• Expanded Table of 6800 Instructions Listed by Category(p. 422)
• Short Table of 6800 Instructions Listed Alphabetically(p. 434)
• Short Table of 6800 Instructions Listed by Category(p. 437)
• Condensed Table of 6800 Instructions Listed by Category(p. 441)
• Condensed Table of 6800 Instructions Listed Alphabetically(p. 443)
• Condensed Table of 6800 Instructions Listed by Op Code(p. 444)
• C.
• Expanded Table of 8086/8088 Instructions Listed by Category(p. 445)
• Condensed Table of 8086/8088 Instructions Listed by Category(p. 465)
• Condensed Table of 8086/8088 Instructions Listed Alphabetically(p. 469)
• D.
• Expanded Table of 6502 Instructions Listed by Category(p. 471)
• Short Table of 6502 Instructions Listed by Category(p. 478)
• Condensed Table of 6502 Instructions Listed by Category(p. 480)
• Condensed Table of 6502 Instructions Listed Alphabetically(p. 481)
• Condensed Table of 6502 Instructions Listed by Op Code(p. 482)
• Appendixes(p. 485)
• 1. The Analog Interface
• 2. Binary-Hexadecimal-Decimal Equivalents
• 3. 7400 Series TTL
• 4. Pinouts and Function Tables
• 5. SAP-1 Parts List
• 6. 8085 Instructions
• 7. Memory Locations: Powers of 2
• 8. Memory Locations: 16K and 8K Intervals
• 9. Memory Locations: 4K Intervals
• 10. Memory Locations: 2K Intervals
• 11. Memory Locations: 1K Intervals
• 12. Programming Models
• Answers to Odd-Numbered Problems(p. 513)
• Index(p. 519)